Current chip technologies face two unsurpassed challenges: the power limit and the architectural limit. They consume too much energy and new chips have difficulty working with older systems. For example, binary logic, used by all computers in the world, uses 0s and 1s to perform arithmetic operations. However, large -scale binary calculations require advanced hardware resources. The architectural limit, on the other hand, is due to the fact that the new chips that are not silicon cannot easily communicate with traditional systems based in CMOS or complementary semiconductors of eitherXido MettoLico.
After searching for a solution since 2022, the Ling Honengge team, experts from the University of Beinhang (China), devised a new system called the hybrid stochastic number (HSN), which combines regular binary numbers with probabilistic numbers to improve performance.
This method uses less hardware and has already been used in areas such as image processing, neural networks and deep learning. Based on the probabilistic calculation, Professor Li’s team He developed a new smart chip for tactile and screen functions in 2023 Using the process technology of 110 nanometers of semiconductor manufacturing international corporation, the main Chinese chips manufacturer.
The project results They were published in IEEE Journal of Solid-State Circuit Two years ago. Subsequently, The team designed another chip for automatic learning, manufactured by a standard CMOS process of 28 Nm.
The latter, in addition to HSN, It also incorporates computing algorithms in memory that reduces the need to transfer data constantly between memory and processors. This helps save energy and increases chip efficiency.
The chip also uses a system design in chip (SOC) that combines different computer units to manage multiple tasks simultaneously, unlike traditional chips that process only one task at the same time.
Currently, this Microchip is operational in intelligent control systems, such as touch screens, where background noise filters to detect weaker signals and improve user interaction with devices.
Li’s team is developing a special instructions set and an adapted chip design for hybrid probabilistic computing. The goal is Use it in areas such as voice and images processingthe acceleration of large AI models and the management of other complex tasks.
“The current chip already reaches a latency of microsecond chipachieving a balance between the acceleration of high performance hardware and the flexibility of software programming, ”says Li.
In this way, China has started The first large -scale application of the non -binary ia chips worldintegrating its patented hybrid computing technology in critical sectors such as aviation and industrial systems.